1. Field of the Invention
The present invention relates generally to semiconductor memory devices, and more particularly, to a flash memory device and an erase method thereof.
2. Discussion of Related Art
In general, a flash memory device includes a plurality of memory cell blocks. Each of the plurality of memory cell blocks includes a plurality of pages. Each of the plurality of pages includes a plurality of memory cells sharing one word line. The flash memory device executes a program operation, a read operation, and an erase operation. In general, the program operation and the read operation of the flash memory device are executed on a page basis and the erase operation of the flash memory device is executed on a memory-cell-block basis. Accordingly, during the program operation and the read operation, address signals corresponding to a corresponding page are inputted to the flash memory device in order to select a corresponding page to be programmed or read. However, since the erase operation is executed on a memory-cell-block basis, address signals corresponding to a corresponding memory cell block are inputted to the flash memory device during the erase operation.
An erase operation process of a flash memory device 10 will be described in short below with reference to FIG. 1.
A block decoder 11 decodes block address signals AD1 to ADP (P is an integer), enables one (for example, BKSEL1) of a plurality of block selection signals BKSEL1 to BKSELN and disables the remaining block selection signals BLSEL2 to BKSELN. A word line driver WLD1 connects global word lines GWL1 to GWL32 to local word lines WL1 to WL32 of a memory cell block MCB1, respectively, in response to the block selection signal BKSEL1. Furthermore, word line drivers WLD2 to WLDN separate local word lines WL1 to WL32 of memory cell blocks MCB2 to MCBN from the global word lines GWL1 to GWL32, respectively, in response to block selection signals BLSEL2 to BKSELN. Consequently, the memory cell block MCB1 is selected as a memory cell block to be erased.
Thereafter, a word line decoder 12 supplies the global word lines GWL1 to GWL32 with erase voltages, respectively, in response to a block erase signal BLK_ERS. As a result, the erase voltages are transferred to the local word lines WL1 to WL32 of the memory cell block MCB1, respectively, through the global word lines GWL1 to GWL32, so that the erase operation of the memory cell block MCB1 is performed.
As described above, the erase operation of the flash memory device 10 is executed on a-memory-cell-block basis. The size of one memory cell block is fixed by a physical structure decided in the process of designing a flash memory device. In other words, the number of pages included in one memory cell block is decided by the number of global word lines decided in the designing process. Accordingly, it is difficult to change the size of a memory cell block included in a flash memory device after the flash memory device is fabricated. FIG. 1 illustrates an example in which each of the memory cell blocks MCB2 to MCBN includes 64 pages PA 1 to PA 64 (i.e., when the number of global word lines is 32).
Meanwhile, there is a need for changing the size of a memory cell block depending on operating characteristics of products to which a flash memory device is applied. For example, in the case where a flash memory device is applied to a semiconductor device in which an application program for processing a large quantity of data at once is executed, it is preferred that the flash memory device includes memory cell block having an increased size. Furthermore, in the case where a flash memory device is applied to a semiconductor device in which an application program for processing a small quantity of data at once is executed, it is preferred that the flash memory device includes memory cell block having a reduced size.
However, in the related art flash memory device, the size of a memory cell block is fixed by the physical structure. Therefore, to change the size of the memory cell block, a flash memory device must be fabricated newly. In this case, since flash memory devices fabricated suitably for specific products (i.e., fabricated to include a memory cell block of a size suitable for specific products) may not be suitable for other products, they have limited applications.